QorIQTM P40x0 Integrated Multicore Communication Processor Janaury 24 - Janaury 28, 2011 in San Jose, CA PLEASE CONTACT ARNEWSH INC. FOR ONSITE TRAINING THIS CLASS IS AVAILABLE TO THOSE HAVING NDA WITH FREESCALE SEMICONDUCTOR FOR P40x0 | |
| Description: |
This is a 5-day class covering hardware and software aspects of the QoreIQ P40x0 Multicore Communication Processors.
A customized, shorter version can be arranged for on-site training.
Students will learn to design and write programs for various chip sub-modules. This includes the embedded Power Architecture Cores (e500mc with MMU and Caches), Buffer Manger, Queue Manager, PAMU, Frame Manager (icluding Parser, KeyGen, Coarse Classifier, Policer, and the MAC units), PCI Express, Serial RapidIO, DMA controllers, Enhanced Local bus, DDRII/III Controller, Reset and configuration and Interrupt Controller. |
| Objectives: |
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| Prerequisites: |
To benefit most from the course, familiarity with the Power Architecture is recommended. On-site classes can be customized to exclude topics which are not of interest.
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| Date: |
Monday, Janaury 24
to Friday, Janaury 28, 2011
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| Time: |
8:30am to 5:00pm
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| Location: |
Freescale Semiconductor Sales Office 5300 Stevens Creek Blvd Suite 550 San Jose, CA 95129 |
| Fee: |
US $2250.00 for the 5-day course. This fee includes the course handouts and manuals. Payment should be arranged no later than one week prior to the start of class.
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| Terms: |
Arnewsh Inc. recommends early registration to ensure availability prior to classes filling up.
Cancellation must be made no later than one week prior to the start date. Otherwise the student will be charged for the class. Substitutions from the same company is allowed. In the event of insufficient enrollment, Arnewsh Inc. reserves the right to cancel the class with at least 1 week advance notice. |
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