QorIQTM P3041/P204x Integrated Multicore Communication Processor October 29 - November 2, 2012 in San Jose, CA PLEASE CONTACT ARNEWSH INC. FOR ONSITE TRAINING | |
Description: |
This is a 5-day class covering hardware and software aspects of the QoreIQ P3041 and P204x Multicore Communication Processors.
A customized, shorter version can be arranged for on-site training.
Students will learn to design and write programs for various chip sub-modules. This includes the embedded Power Architecture Cores (e500mc with MMU and Caches), Buffer Manger, Queue Manager, PAMU, Frame Manager (icluding Parser, KeyGen, Coarse Classifier, Policer, and the MAC units), PCI Express, Serial RapidIO, RapidIO Message Manager (RMan), DMA controllers, Enhanced Local bus, DDRII/III Controller, Reset and configuration and Interrupt Controller. |
Objectives: |
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Prerequisites: |
To benefit most from the course, familiarity with the Power Architecture is recommended. On-site classes can be customized to exclude topics which are not of interest.
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Date: |
Monday, October 29
to Friday, November 2, 2012
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Time: |
8:30am to 5:00pm
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Location: |
Freescale Semiconductor Sales Office 2680 Zanker Road Suite 200 San Jose, CA 95134 |
Fee: |
US $2250.00 for the 5-day course. This fee includes the course handouts and manuals. Payment should be arranged no later than one week prior to the start of class.
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Terms: |
Arnewsh Inc. recommends early registration to ensure availability prior to classes filling up.
Cancellation must be made no later than one week prior to the start date. Otherwise the student will be charged for the class. Substitutions from the same company is allowed. In the event of insufficient enrollment, Arnewsh Inc. reserves the right to cancel the class with at least 1 week advance notice. |
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