MC68360 QUICC - QUad Integrated Communication Controller Dates Offered: NO OPEN CLASSES ARE PLANNED AT THIS TIME, PLEASE CONTACT ARNEWSH INC. FOR ONSITE TRAINING
Description:	This is a 4-day class covering the hardware and software aspects of the MC68360 Quad Integrated Communication Controller (QUICC) microcontroller. This class consists of lecture, lab, and exercises. Students learn to design and write programs for the various chip modules. This includes the CPU32+ core, communication processor module (CPM) and system integration module (SIM60).
Objectives:	Write programs for the CPU32+ core Write programs for exception processing - interrupts, bus error, reset Write programs to initialize and configure the SCCs to Tx and Rx data using various protocols (UART, HDLC and ethernet) Initialize the memory controller and chip selects to support various memory devices (DRAM, SRAM) Program the timer for input capture and output compare Write programs to Tx and Rx data using the SMC and the SPI Program the IDMA controller to transfer data
Prerequisites:	To obtain the most benefit from this seminar, a software and hardware understanding of the MC68000 microprocessor is helpful. A self-study set of introductory notes covering MC68K background topics is available upon request for those lacking MC68K background and who wish to prepare for this class.
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